Series Load Resonant Power Supply basics


Figure 1. MicroSim model of a full-bridge, series load resonant power supply

The main characteristic of a series load resonant power supply is that the "load" is series-resonant, i.e. includes an inductor L and capacitor C in series. Such a load has resonance frequency

f = 1 / (2 * PI * SQRT( L * C ))

and a minimum impedance

Z = SQRT( L / C ).

Once a voltage V is applied to such an LC series, current will rise to a maximum

Imax = V / Z

after 1 / (4*f) seconds and then will drop to zero at time 1 / (2*f) seconds. After this, current will reverse polarity and perform another cycle, ending to zero at time 1/f. If voltage is applied at time 0 and removed at time 1 / (2*f), the switching will happen at zero-current time instants and, therefore, switching losses will be minimal. Glitches and snubber requirements will be eliminated: as the current evolves in a sinusoidal way, also requirements for a fast switching transition will be relaxed.

In Fig.1, the resonant load capacitor is C2 and the inductor is L1: the transformer is part of the resonant load but does not influence the resonance frequency. Its leakage inductance is in series with L1 and, usually, too small to be relevant. Its parasitic capacitance and equivalent capacitance accounting for C1 can be lumped as an equivalent capacitor in series with C2: as its value is several orders of magnitude greater than C2, it does not affect the resonance frequency value.

The LC load series can be fed by different switch topologies, but for high power (> 1 kW) the full-bridge topology is preferred: the switching sequence evolves as follows

  1. S1 and S4 close at time 0
  2. S1 and S4 open at time 1 / (2*f)
  3. Negative current flows back through D5 and D7, reaching zero at time 1 / f
  4. S3 and S2 close at time k + 1 / f
  5. S3 and S2 open at time k + 1 / f + 1 / (2*f)
  6. Negative current flows back through D6 and D8, reaching zero at time k + 1 / f + 1 / f
  7. The switching cycle is repeated

k is the time delay between pulses (k = 0 in Fig.2): it affects directly the time required to fully charge capacitor C1, which actually is the external capacitor intended to be charged by the power supply.

Figure 2. Power supply switching cycles.

As it can be noticed from Fig. 3, during a full-charging cycle the maximum pulse current remains almost constant: this power supply topology (operated with the above metioned cycle timings) is therefore inherently a constant-current source. Short-circuit protection and optimized charging time are thus achieved without additional control circuitry. C2 has to be rated for a maximum voltage of 2 * Vbus. IGBTs or MOSFETs can be used as switches for frequencies up to 200 kHz.

Figure 3. Capacitor C1 full-charging cycle.